Appendix 10. Battery Pack Information

Offset address P = 50501 + 50 * n (n represents the number of packs, 0 ≤ n < 32, n = 0 represents the first pack)

PROCESSOR REGISTER ADDRESS	DATA TYPE	DATA DESCRIPTION	DATA	COMMENTS
P+1	UINT16	Enable insulation detection	R/W	1: Enable insulation detection (valid for single pack) 0: No insulation testing
P+2	UINT16	Reset	R/W	0: Do not recover 1: Automatic recovery 2: Recovery on command
P+3	UINT16	Amber light control	R/W	0: Off 1: On (Level 3 fault) 2: Flash 300 ms (Level 2 fault) 3: Flash 500 ms (Level 1 fault)
P+4	UINT16	PCS Fan Control	R/W	0: Off 1: On (N/A for the AES cabinet)
P+5	UINT16	PACK Fire Alarm 1–16	R	See Appendix 19 for details
P+6	UINT16	PACK Fire Alarm 17–32	R	See Appendix 19 for details
P+7	UINT16	PACK MSD Alarms 1–16	R	See Appendix 20 for details
P+8	UINT16	PACK MSD Alarms 17–32	R	See Appendix 20 for details